(1) Field of the Invention
The present invention relates to a solid-state imaging apparatus and a manufacturing method thereof.
(2) Description of the Prior Art
In recent years, as a solid-state imaging apparatus which forms a sensing apparatus of a camera, especially that of a digital camera, a CCD (Charge Coupled Device) type solid-state imaging apparatus is mainly used. Seeking further high efficiency such as higher image quality, longer time for use, higher speed of continuous-shooting, and lighter weight for the camera, it is necessary for the solid-state imaging apparatus to achieve high pixel density, lower electric power consumption, high speed, miniaturization and the like.
There are several problems to satisfy these requirements. Following problem occurs particularly when solid-state imaging apparatus with high pixel density having high CCD transfer efficiency is realized. An increase of the number of pixels causes an increase of the number of transfer stages, that is, a deterioration of transfer efficiency is caused. Therefore, a distance between transfer electrodes needs to be shortened to increase the transfer efficiency of the CCD. Further, it is difficult for a transfer electrode of horizontal transfer CCD to increase the transfer efficiency since it applies only low driving voltage with high driving frequency to reduce electric power consumption. Thus, shortening the distance between transfer electrodes is also necessary to increase the transfer efficiency of the horizontal transfer CCD. However, the distance between transfer electrodes is generally designed as long as a minimum length determined by lithography. Therefore, the transfer efficiency of CCD cannot be increased by shortening the distance between transfer electrodes than the minimum length determined by the lithography.
A prior art for solving these problems is a “solid-state imaging apparatus” (refer to Japanese Laid-Open Patent publication application No. 7-74337, pp. 16, FIG. 24). According to the prior art, a solid-state imaging apparatus shortens a distance between transfer electrodes and increases the transfer efficiency of CCD by making transfer electrodes to have two layered overlap poly-silicon structure.
FIG. 1 is a schematic plane diagram indicating an arrangement of transfer electrodes in a conventional solid-state imaging apparatus.
As shown in FIG. 1, a conventional solid-state imaging apparatus is comprised of a semiconductor substrate 310, a first layer poly-silicon electrode 320 and a second layer poly-silicon electrode 330 which form a two layered overlap poly-silicon electrode, an embedded channel region 340 which is formed in a surface unit of the semiconductor substrate 310 and becomes a transfer path for signal charge, and a photodiode region 350 aligned photodiodes which convert light into signal charge and accumulate the signal charge. Here calls a distance between transfer electrodes of vertical transfer CCD as d and a distance between transfer electrodes of horizontal transfer CCD as e. The horizontal transfer CCD is a two-phase-driving CCD which transfers charge by applying voltage with two different levels of H1 and H2. The vertical transfer CCD is a four-phase-driving CCD which transfers charge by applying voltage with four different levels of V1, V2, V3 and V4.
Next, a method of manufacturing a solid-state imaging apparatus which has the arrangement of transfer electrodes as above described is explained.
FIGS. 2 are a schematic plane diagram indicating the arrangement of transfer electrodes in a conventional solid-state imaging apparatus and a schematic cross-section diagram at A-A′ line in the schematic plane diagram. In here, same components as in FIG. 1 are put with the same marks as in FIG. 1, and the detail explanations about those components are omitted.
First, as shown in FIG. 2A, the first layer poly-silicon electrodes 320 are formed on a gate insulation film 410 on the semiconductor substrate 310 and oxidized for forming first oxide films 420 to insulate between layers.
Next, as shown in FIG. 2B, the second layer poly-silicon electrodes 330 are formed between two adjoining first layer poly-silicon electrodes 320 on the gate insulation film 410.
Accordingly, in a conventional solid-state imaging apparatus, the distance between transfer electrodes of the vertical transfer CCD d and the distance between transfer electrodes of horizontal transfer CCD e are determined by thickness of the first oxide film 420 between the first layer poly-silicon electrode 320 and the second layer poly-silicon electrode 330. Therefore, the distance can be shortened than the minimum length determined by lithography.
Here, FIG. 3 explains that the transfer efficiency of CCD is increased as a distance between transfer electrodes is shortened.
FIG. 3 is a change diagram of potential distribution that explains a transfer of signal charge. FIG. 3 shows the potential distribution along the A-A′ line on the plane diagram in FIG. 2. In the transfer of signal charge, respective potential of a first layer poly-silicon electrode 320a, a second layer poly-silicon electrode 330a, a first layer poly-silicon electrode 320b, and a second layer poly-silicon electrode 330b are φV1, φV2, φV3, and φV4.
In a time t1 when the potential φV1 and the potential φV2 are at high level, a region controlled by the first layer poly-silicon electrode 320a and the second layer poly-silicon electrode 330a have a deeper potential than a region controlled by the first layer poly-silicon electrode 320b and the second layer poly-silicon electrode 330b. Therefore, the signal charge is accumulated in the region controlled by the first layer poly-silicon electrode 320a, and the second layer poly-silicon electrode 330a. 
In a time t2 when the potential φV3 is also at a high level, a region controlled by the first layer poly-silicon electrode 320a, the second layer poly-silicon electrode 330a and the first layer poly-silicon electrode 320b have a deeper potential than a region controlled by the second layer poly-silicon electrode 330b. Therefore, the signal charge is accumulated in the region controlled by the first layer poly-silicon electrode 320a, the second layer poly-silicon electrode 330a, and the first poly-silicon electrode 320b. 
In a time t3 when the potential φV1 is at a low level, a region controlled by the second layer poly-silicon electrode 330a and the first layer poly-silicon electrode 320b have a deeper potential than a region controlled by the first poly-silicon electrode 320a and the second layer poly-silicon 330b. Then, the signal charge is accumulated in the region controlled by the second layer poly-silicon electrode 330a and the first layer poly-silicon electrode 320b. Thus, the signal charge is transferred from the region controlled by the first layer poly-silicon electrode 320a and the second layer poly-silicon electrode 330a to the region controlled by the second layer poly-silicon electrode 330a and the first layer poly-silicon electrode 320b. At this time, a potential pocket is formed between the region controlled by the first layer poly-silicon electrode 320a and the region controlled by the second poly-silicon electrode 330b. Some of signal charges are trapped in the potential pocket so that the signal charge is not transferred completely.
In the case where a distance between transfer electrodes is consistent, the formation of a potential pocket is determined by a difference of potentials under the adjoining electrodes and the potential pocket is formed when the difference of the potentials becomes smaller than the consistent value. Accordingly, in FIG. 3, the difference of the potentials under each electrode of potential at high level becomes smaller so that a potential pocket is formed under inter-transfer-electrodes. Also, the difference of the potentials under each transfer electrode of potential at low level becomes zero so that a potential pocket is formed. On the other hand, since the difference becomes larger between the potential under transfer electrode of potential at higher level and the potential under transfer electrode of potential at low level, a potential pocket is not formed.
In general, a size of a potential pocket is determined by the distance between transfer electrodes and the size becomes smaller as the distance gets shorter under an interaction of each electric field of transfer electrodes.
As above described, in a transfer of signal charge, a potential pocket is formed under inter-transfer-electrodes, the potential pocket being a cause of lowering the transfer efficiency of signal charge. Therefore, the transfer efficiency of CCD is increased by making the potential pocket smaller, that is, by making the distance between transfer electrodes shorter.
Note that, while FIG. 3 explains about the four-phase-driving CCD, the same thing as above described occurs in the two-phase-driving CCD used generally for a horizontal transfer CCD.
In a conventional solid-state imaging apparatus, higher driving voltage is applied to transfer electrodes of the vertical transfer CCD since the vertical transfer CCD not only transfers the signal charge but also reads out the signal charge from a photo receiver unit. Therefore, when the inter-transfer-electrodes distance d in the horizontal transfer CCD is shortened to increase the transfer efficiency, enough breakdown voltage between transfer electrodes cannot be obtained. Thus, when the inter-transfer electrodes distance e is shortened to increase the transfer efficiency, the inter-transfer-electrodes d in the vertical transfer CCD is shortened. It is because that the inter-transfer-electrodes distance d in the vertical transfer CCD equals to the inter-transfer-electrodes distance e in the horizontal transfer CCD since the vertical transfer CCD and the horizontal transfer CCD are formed by the same process. As the consequence, the breakdown voltage between transfer electrodes becomes insufficient.